Precursor is an open hardware development platform for secure, mobile computation and communication. Though it accommodates a built-in display, a physical keyboard, and an internal battery, this pocket-sized device remains smaller and lighter than the average smartphone. Precursor was built for everyday use but compromises nothing as a development platform. Powered by an FPGA-hosted, soft-core System-on-Chip (SoC), it gives developers the freedom to customize nearly every aspect of the platform.

Precursor was designed from the ground up to provide security by justifying trust in an increasingly hostile world. Its transparent, minimalistic design invites inspection and mitigates supply chain attacks; its embedded cryptographic primitives simplify the implementation of computationally-intensive protocols, such as the Double Ratchet that has brought end-to-end encrypted communication into the mainstream; and its sealing primitives facilitate the creation and storage of cryptographic keys.

Despite a tightly integrated mobile form factor, Precursor also provides hooks for hardware mods. Its keyboard is a separate, I²C-provisioned PCB that opens the door to novel layouts and innovative sensors; and its battery cavity exposes GPIOs that allow developers to trade battery life for additional hardware functionality.

Safeguard Your Chats, Your Keys, and Your Freedom to Tinker

Precursor is a solid starting point for your project, whether that project involves a highly secure messaging platform, an isolated crypto wallet, a hardened authenticator, or something way more fun like a handheld retro-gaming console. Precursor ships with a reference firmware that demonstrates how to integrate the diverse components that we’ve built into the platform. Below are a few examples of things you might want to do with those components:

Secure Communication: Precursor’s easier-to-verify hardware design, self-provisioning, and support for modern crypto primitives make it a great match for secure communication applications. It obtains network connectivity by way of a hardware-sandboxed Silicon Labs WF200 chip, and its built-in headphone jack opens the door to end-to-end encrypted voice chat.

Key Protection: The security and verification features that make Precursor ideal for secure chat are also critical when developing two-factor authentication (2FA) solutions, crypto wallets, and password databases. And because supply-chain attacks are particularly devastating against these kinds of bang-for-your-buck targets, you might decide to limit that attack surface by building your own SoC and firmware from scratch, which is something Precursor was designed to facilitate. Finally, Precursor’s comprehensive user-experience (UX) primitives and network connectivity allow it to do more than just authorize signing operations. In addition to checking the full details of a transaction, it has the potential to accommodate the entire UX for your crypto wallet or authenticator so that you don’t have to interact with external software running on a potentially compromised host system. Precursor puts the "2F" back in 2FA.

CPU Emulation: While the reference FPGA ships with a 32-bit RISC-V CPU running at 100MHz, it can be reconfigured to emulate a wide range of retro-CPUs, from the 6502 to the Z-80 to something we’ve never even heard of. Furthermore, Precursor’s FPGA-based design can accurately emulate old sound chips in hardware, and its modular keyboard can be swapped out for an alternative that more closely resembles your favorite old controller. Be warned, however: it will no longer fit in your pocket if you mount a joystick on it.

Transparency All the Way Down

Every bit of Precursor is inspectable and hackable. That includes the mainboard, daughtercards, and case, the SoC implementation, the EC implementation, the MVP firmware, and the work-in-progress operating system.

Features & Specifications

  • User-customizable CPUs
    • Xilinx XC7S50 primary System on Chip (SoC) FPGA
      • -L1 speed grade for longer battery life
      • Tested with 100 MHz VexRISC-V, RV32IMAC + MMU, 4k L1 I/D cache
    • iCE40UP5K secondary Embedded Controller (EC) FPGA
      • Manages power, standby, and charging functions
      • Tested with 18 MHz VexRISC-V, RV32I, no cache
  • 16 MB external SRAM
  • 128 MB FLASH
    • 100 MHz DDR 8-bit wide bus for fast XIP code performance
  • Dual hardware TRNG
    • External discrete noise generator
    • In-SoC ring oscillator based TRNG
  • Inspectable I/O
    • Physical keyboard with changeable layout overlays
    • 200ppi black and white LCD (336x536 resolution), 100% inspectable with standard optical microscope
    • Both keyboard and LCD are backlit for night-time use
    • Modular keyboard PCB – customize layouts, add sensors or swap in a touch surface
  • Audio with safe defaults
    • Integrated 0.7 W speaker for notifications
    • Vibration motor
    • 3.5 mm headset jack
    • No integrated microphone – audio surveillance is not possible when headset is unplugged
  • Integrated wifi
    • Sandboxed in a hardware-delineated untrusted domain
    • Silicon Labs WF200C chipset
  • USB type C port
    • Supports charging at 5 V; OVP tolerant to 20 V
    • Power negotiation to 5 V @ 1.5 A (source and sink)
    • Supports legacy USB 2.0 full-speed PHY
    • Basic DRP negotiation hardware support
  • 1100 mAh Li-Ion battery
    • Integrated gas gauge for more accurate battery life estimate
    • Full charge in about 3 hours
    • Runtime depends on user application
      • Approx. 100 hours standby with wifi+EC+static display enabled
      • Approx. 700 mW "on-state" (most features enabled and active, backlight off) power draw or 5.5 hours continuous use
  • Anti-tamper features
    • User-sealable metal can for trusted components
    • Dedicated RTC with basic clock integrity monitoring
    • Power monitors trip reset in case of power glitches
    • Always-on accelerometer/gyro to detect movement in standby
    • Support for instant secure erase via battery-backed AES key and self-destruct circuit
  • Slim and light mobile form factor
    • 69 mm x 138 mm x 7.2 mm
    • 96 grams reference weight
    • Compare to iPhone X at 70.9 mm x 143.6 mm x 7.7 mm and 174 grams
    • Accessible mechanical design
      • 6063 alloy aluminum case – 3D files provided, so you can mill your own case!
      • FR-4 front bezel – PCB source provided
      • ABS+PC polymer antenna radome – 3D printable
  • Made for developers
    • Easy-access developer's cable
    • Low-level debugging (GDB + Chipscope) and firmware flashing via developer's cable plugged into a custom Raspberry Pi hat
    • Middleware debugging via USB cable via wishbone tunnel
    • Open-source to the core
      • Inspect, modify and compile your SoC and EC from source
      • All source files hosted on GitHub for convenient fork, pull request and issue tracking
      • Open source PCB and case design
    • Extendable and modifiable
      • No adhesives holding the bezels in place – just one screw driver is all it takes
      • Want to add hardware? Maybe a cellular modem? No problem!
        • Battery compartment is a blank check for your peripherals
        • Install a smaller battery for more space
        • Flex PCB breakout for 8x FPGA GPIO into the battery compartment
        • Bezel is made out of FR-4, and can be user-customized to hold additional components

Reference "Betrusted-SoC" SoC FPGA design features

  • XC7S50-1L CSG324I, 80% utilized
  • 100 MHz customized VexRISC-V RV32IMAC + MMU core with 4k caches
  • Crypto primitives
    • Ring oscillator TRNG (compliments off-chip TRNG)
    • JTAG-based self-fusing for on-chip generation and sealing of secret keys
    • AES-128, -192, -256 with ECB, CBC and CTR modes
    • SHA-2 and SHA-512 digests
    • Microcoded Curve25519 field arithmetic engine
  • SPI
    • High speed, 100MHz DDR OPI SPI interface for code ROM
    • Low speed, 20MHz SDR 1-bit SPI interface to insecure domain
  • I²C (100 kHz) for system integration
  • Keyboard switch matrix controller with low power standby
  • Bidirectional I²S interface for audio
  • Custom frame buffer-based LCD interface
  • 32-bit async SRAM interface with standby support
  • Standard UART
  • Full speed USB device
  • Hardware Ticktimer
  • 12-bit ADC (system voltage monitor)
  • GPIO for power management and extension

Reference "Betrusted-EC" EC FPGA design features

  • iCE40UP5K SG48, 98% utilized
  • 18 MHz LiteX VexRISC-V RV32I core (minimal+debug config)
  • I²C (100 kHz) via softcore for system integration
  • 2x SPI interfaces
    • FIFO buffered peripheral interface to SoC
    • Controller interface to Wi-Fi chipset
  • Hardware Ticktimer
  • Standard UART
  • GPIO for power control

Precursor is part of the Silicon Labs IoT Accelerator!